Analog Office® design suite is the first complete IC design system in over ten years that is specifically architected and optimized from the ground up for next-generation analog and RFIC designs. The Analog Office design system provides an entirely new approach that achieves optimum RF design closure through a unified data model and design environment encompassing all of the design domains. The solution boasts an industry-first, concurrent interconnect-driven and RF-aware Intelligent Net™ (iNet) methodology that delivers unprecedented ease-of-use, interactivity and openness. The Analog Office 2006 version is now integrated with APLAC’s world class, foundry-approved circuit simulation engine, which has been used in Nokia product development for more than 10 years. In addition, the new release features the second generation of AWR’s unique iNet technology, as well as dramatic improvement in layout editing capacity and performance, and an open RF design platform with five best-in-class electromagnetic (EM) tools, four circuit simulators, and a complete physical design and verification toolset, all fully integrated into the single design platform. The complete front-to-back Analog Office 2006 design suite continues to set the pace in advanced RFIC EDA, providing the most innovative, interconnect-driven, and open RFIC design platform in the industry. Analog Office 2006 software enables designers to significantly shorten their development cycles, achieve faster time-to-tapeout, and ensure first pass silicon success. · Interface to the industry-leading APLAC® simulator · Robust new iNet2 model for faster and more accurate design, simulation, extraction, and layout of chip interconnects · Higher capacity, faster layout editing and advanced layout capabilities · Innovative SPICE extractor for efficient and accurate simulation in time domain · Streamlined integration to OEA International™s NET-AN 3D net extraction technology for on-the-fly interconnect extraction of multiple silicon nets · Support for busses and bundles, iterated instances, and inherited connections · Strengthened link to Mentor Calibre DRC and new Mentor Calibre layout vs. schematic (LVS) interface