SANTA CLARA, Calif., Jan. 17, 2007 -- Agilent Technologies Inc. (NYSE: A) today introduced the J-BERT N4903A 7 Gb/s and 12.5 Gb/s pattern generators with complete jitter injection capabilities. Design and test engineers can now quickly and accurately stimulate serial high-speed ports with all types of jitter, enabling higher-quality characterization of device performance. The Agilent J-BERT N4903A pattern generators can be used in combination with oscilloscopes, built-in error detectors or other analyzers. The next generation of multi-gigabit devices using technologies such as PCI Express, Serial Advanced Technology Attachment and fully buffered DIMM (dual inline memory module) are being introduced in the computer industry. Engineers need simple, cost-efficient test solutions for characterization and conformance testing of these high-speed interfaces to meet time-to-market and cost objectives. The new Agilent J-BERT N4903A 7 Gb/s and 12.5 Gb/s pattern generator options are cost-efficient digital stimuli, enabling quick and accurate characterization and compliance test of high-speed serial interfaces. Design and test engineers can use the J-BERT pattern generators to inject clean as well as worst-case jittered pattern and clock signals into the device under test. Analysis tools, such as oscilloscopes, built-in error ratios test (BIST), or other analyzers can be used to monitor the behavior of the device under test under ideal and worst-case conditions. The J-BERT N4903A pattern generators enable fast and accurate testing by: Simplifying worst-case jitter tolerance testing with built-in and calibrated jitter sources for random jitter (RJ), periodic jitter (PJ) and bounded uncorrelated jitter (BUJ). Allows eye closures of greater than 0.5 UI; Emulating inter-symbol interference (ISI) (option J20); Testing robustness against differential-mode or single-mode noise (option J20); Injecting commonly used spread spectrum clocks (SSC); Simplifying instrument setup for serial computer bus devices, which require: complex training sequences can be setup easily with the pattern sequencer and 32 MB pattern memory; all types of clock- and data rate ratios can be generated with the sub rate clock outputs; Covering all popular data rates between 150 Mb/s and 7 Gb/s (option G07) or to 12.5 Gb/s (option G13); Giving accurate results based on excellent signal performance with 20 ps transition times (20 percent - 80 percent) and 9 ps peak-peak jitter; and Providing grow-as-you-go functionality, which allows the user to add complete J-BERT functionality over time with error detector, CDR and complete jitter tolerance test. "The new Agilent J-BERT 7 Gb/s and 12.5 Gb/s pattern generators offer significant time and cost savings for design and test teams," said Siegfried Gross, Agilent's Digital Verification Solutions general manager. "Once again, Agilent demonstrates its leading role in physical layer testing.