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Designing and testing wireless communications systems like the wireless handset at the system level can be challenging. Using circuit-level designs and models in hierarchical RF-system simulation and trade-off analysis, for example, is slow and cumbersome. Further complicating matters, behavioral models do not accurately represent a circuit’s nonlinear behavior in phase and magnitude at all harmonics. The challenge is no less complex for the component/device designer supplying their Intellectual Property (IP) to the system designer/integrator. Traditionally, the designer would have to wait until a physical hardware prototype of their circuit-level design was available before sending it to the system designer/integrator for evaluation within their system. It may take several months for the chip to be manufactured and several more to properly characterize it across different operating parameters. Finding a way to share the performance of their circuit-level design with the system designer/integrator, instead of waiting for a physical prototype, represents a significant competitive advantage not only for the designer vying for an early design win, but also for the system designer/integrator hoping to deliver their product to market ahead of the competition.
A fast, accurate behavioral model based on X-parameters generated from a circuit-level design, offers an ideal way for the designer to share the performance of their circuit-level design with the system design/integrator, prior to the availability of a physical prototype. Using these models, the system designer/integrator can evaluate overall system performance and conduct trade-off analysis earlier in the design cycle and much faster than if they were working with circuit-level designs. Because the X-parameter-based models are accurate and characterized over the same set of parameters that would be used to characterize the actual physical device, they also have a higher degree of confidence that the chip will work within the system the first time.
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