STMicroelectronics and Circuits Multi Projets® (CMP) have announced that the CMOS 28 nm process from STMicroelectronics is now available for prototyping to universities, research labs and companies through the silicon brokerage services provided by CMP.
The introduction of the 28 nm CMOS process builds on the successful collaboration that has allowed universities and companies to access previous CMOS generations such as 45 nm (introduced in 2008), 65 nm (introduced in 2006), 90 nm (introduced in 2004), and 130 nm (introduced in 2003). CMP is also offering 65 nm and 130 nm Silicon-On-Insulator (SOI), as well as 130 nm SiGe processes from STMicroelectronics. 170 universities and companies received the design rules and design kits for the 90 nm CMOS process, and more than 200 universities and companies (60 percent in Europe, 40 percent in Americas and Asia) have received design rules and design kits for ST’s 65 nm bulk and SOI CMOS processes. The 45/40 nm CMOS is still being deployed.
“There has been a great interest in designing ICs in these processes, with about 300 projects having been designed in 90 nm (phased out in 2009), and 200 already in 65 nm,” said Bernard Courtois, director of CMP. “In addition, 60 projects have already been designed in 65 nm SOI and it is interesting to note that many top universities in Europe, in the USA and in Asia have taken advantage of the CMP/ST offer.”
“This very exciting program perfectly illustrates our strong involvement with the education and research communities. It is essential that university students and researchers can have access to the most advanced technologies, which we have been providing in cooperation with CMP for two decades,” said Patrick Cogez, Director, universities and External Relations, Front-End Technology and Manufacturing at STMicroelectronics. “Ensuring that universities have access to our leading-edge technologies also helps us to attract the best young engineers as part of our commitment to remain a technology leader on a long-term basis.”