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To address today's market requirements for a low-cost, high-performance frequency synthesizer, Phase Matrix has introduced the QuickSyn™ series of microwave frequency synthesizers. The employed patented architecture provides a unique combination of fast-switching speed and low phase noise characteristics. The main idea is to substitute a slow-tuning, bulky and expensive YIG oscillator (normally used in high-end designs) with a tiny VCO that can easily support microsecond tuning. Excessive phase noise (traditionally associated with VCO devices) is suppressed by utilizing an ultra-wideband PLL scheme in conjunction with a low-noise reference source. In contrast to traditional architectures (which tend to minimize the PLL division ratio), this new technology makes a radical step by completely removing the divider from the loop. Moreover, it inverts the PLL division ratio by applying a multiplication within the PLL that drastically improves both phase noise and spurious characteristics. These characteristics are achieved by using low-cost, general-purpose ICs, which are offered as standard "off-the-shelf" parts. Inside any synthesizer, there are always many devices that can potentially carry multiple functions and be reused to increase functionality without a significant cost penalty. This philosophy has resulted in a compact design (see Figure 1), which demonstrates excellent performance and extended functionality.
Figure 1 QuickSyn™ synthesizer with module-level size and cost.
The QuickSyn synthesizer is available in two models, the FSW-0010 and FSW-0020, covering 0.1 to 10 GHz and 0.2 to 20 GHz, respectively. Both models utilize broadband solid-state VCOs that offer fundamental output to 10 and 20 GHz, respectively. In contrast to widely used frequency multiplication schemes, this approach eliminates possible spectrum contamination by sub-harmonic products. The VCO coverage is extended down by utilizing a frequency divider that improves phase noise and spurious characteristics at lower frequencies. The use of the advanced direct digital synthesis (DDS) approach (in conjunction with dedicated spur-reduction circuitry) enables a very fine frequency resolution of 0.001 Hz without a common penalty of slower tuning speed or elevated spurs.
The synthesizer includes a highly stable internal OCXO that is factory calibrated to a GPS standard to ensure adequate accuracy of the synthesized signal. The OCXO supplies a 10 MHz reference signal to the outside world. The internal oscillator can be automatically locked to an external reference too. The synthesizer also provides the ability to adjust the internal oscillator frequency (via software) for temperature and aging compensation as desired.
The utilized PLL hardware itself needs just a few tens of microseconds to bring the output frequency to a desired value while the output is completely locked and refined within less than a hundred microseconds. Digital signal processing adds extra delays required to receive a tuning command, perform all necessary calculations in accordance with the employed frequency plan, and program individual devices. Hence, the total switching time is specified at 200 μsec in the regular operation mode when new frequency commands are sent one-by-one. Most of these delays, however, can be reduced or completely eliminated in the list mode. The switching speed in the list mode is specified at 100 µsec regardless of the current and destination frequency (i.e., the specification is valid from "any to any" frequency step within the entire operating range). Furthermore, the synthesizer provides a software-selectable blanking function that allows turning-off the RF output while it transitions to the new-programmed frequency. This prevents the output frequency uncertainty that otherwise may result in unexpected behavior of a system where the synthesizer is utilized.
Figure 2 Phase noise performance at 20 GHz output.
VCO phase noise is controlled by utilizing an ultra low-noise reference OCXO as well as a very wide (a few MHz) loop bandwidth. The employed architecture allows realizing nearly "ideal" frequency translation with minimal added phase noise degradation. Typical phase noise measured at a 20 GHz output and a 10 kHz offset is -116 dBc/Hz, as shown in Figure 2. The phase noise at a 10 GHz output drops down to -122 dBc/Hz, which supersedes the performance of traditional YIG-based synthesizers at the same frequency settings. Phase noise remains flat to a few MHz offset then rolls down sharply showing about -153 dBc/Hz noise floor. At lower output frequencies, phase noise is further improved at 6 dB per octave rate resulting from the employed frequency division scheme.
In contrast to conventional designs, the employed technology does not elevate any PLL-induced spurs (since the multiplication factor equals unity or below unity within the loop). As a result, the output is clean of spurious perturbations to typical levels of -80 dBc and even lower. Note that it is quite hard to measure the spurs at these levels since they become comparable to the spurs generated by the test equipment itself. Thus, the spurious emission is specified at -65 dBc to simplify product testing in mass production. A filter bank at the synthesizer output reduces generated harmonics, which typically do not exceed -40 dBc. Another benefit of the utilized approach is reduced microphonics as a result of the use of a low-mass VCO and very wide loop filter bandwidth.
Figure 3 The FSW-0010 model supplies -25 to +15 dBm leveled output.
The synthesizer supplies almost +20 dBm unleveled output power that is calibrated and digitally controlled between -25 and +15 dBm (FSW-0010 model), as shown in Figure 3. The FSW-0020 control range is -10 to +13 dBm. The output power is controlled using an open-loop method that ensures extremely fast output power settling. The design also includes sophisticated temperature compensation resulting in flat and repeatable output power characteristics across operating frequency and temperature ranges. The output power can also be turned off (i.e., muted) by switching off the output power amplifier. Note that the VCO and PLL core remain turned on, which minimizes recovery time when the synthesizer is back to normal operation.
Figure 4 QuickSyn™ GUI emulates traditional bench-top signal generators.
The QuickSyn communicates with the external world via SPI interface, which provides high throughput and flexibility. In addition to the SPI, the complimentary USB connection offers instant deployment of the synthesizer using a personal computer. The QuickSyn comes with a GUI that emulates virtually all functions available in traditional bench-top and rack-mountable signal generator instruments, as illustrated in Figure 4.
The QuickSyn offers both frequency and power sweep functions in two modes. The fast sweep mode ensures very fast switching speed by calculating all necessary parameters prior to initiating a sweep. A disadvantage is a limited number of points (32,000) due to internal memory limitations. Alternatively, in the normal mode, all calculations are made on the fly, thus enabling an unlimited number of points. The list mode offers even better flexibility by storing a list of frequencies and power levels in the synthesizer's memory. The list is executed by sending a proper command or by applying a trigger signal. Once the CPU detects a trigger pulse, it commands the synthesizer to move from one frequency-power state to another according to the programmed list. Alternatively, the synthesizer can go to the next state, stop there, and wait for the next trigger pulse; the process then repeats.
Furthermore, the QuickSyn provides all major modulation capabilities including pulse, amplitude, frequency and phase modulation. For example, when the pulse modulation is enabled, the synthesizer accepts external CMOS pulses that turn on and off the synthesizer's output with a better than 80 dB on/off ratio and 10 nsec rise/fall time. Similarly, the AM and FM functions are realized by applying a modulating signal to a proper input and enabling a desired mode. Both AM and FM input sensitivity is adjustable by software. Note that the inputs are DC coupled, thus the user can change both amplitude and phase of the synthesized signal by varying a DC voltage on a proper input.
The synthesizer is shielded in a small metal box and is biased from a single +12 V DC supply. The nominal power consumption is less than 18 W for the FSW-0010 model and 20 W for the FSW-0020 model. The built-in self test monitors the synthesizer's internal temperature and voltages as required. Overall, the exceptional performance, extended functionality and small footprint make the QuickSyn synthesizer an ideal building block for a variety of instruments and subsystems.
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